1. Field of the Invention
The present invention relates to a semiconductor device manufactured by including the step of annealing a semiconductor film using a laser beam (hereinafter referred to as laser annealing) and a manufacturing method thereof. Note that the semiconductor device indicated here includes an electrooptical device such as a liquid crystal display device or a light emitting device and an electronic device including the electrooptical device as a part.
2. Description of the Related Art
A technique for performing laser annealing to a semiconductor film formed on an insulating substrate made of glass or the like to crystallize it or to improve crystallinity thereof is widely studied. Silicon is often used for the above semiconductor film.
Recently, in order to improve mass production efficiency, there is remarkable movement toward enlargement of a substrate such that the standard substrate size used in production lines of newly constructed factories is now becoming 600 mm×720 mm. It is difficult with a currently available technique to process a synthetic quartz glass substrate into a substrate having such a large area. Even if that is possible, it is considered that its price cannot be reduced to a level practical for industrial use. There is, for example, a glass substrate as a material capable of easily manufacturing a large area substrate. The glass substrate has an advantage such as low cost and easiness of manufacturing the large area substrate, as compared with the synthetic quartz class substrate frequently used in the prior art. Also, a laser is preferably used for crystallization because the melting point of the glass substrate is low. The laser can apply high energy to only a semiconductor film without largely increasing a temperature of the substrate.
There is a substrate called, for example, Corning 7059 as the glass substrate. Corning 7059 is quite inexpensive, has high processability, and can be easily enlarged in size. However, the distortion point temperature of Corning 7059 is 593° C. and a problem is caused in the case of heating at 600° C. or higher. Also, there is Corning 1737 having a relatively high distortion point temperature as one of glass substrates. The distortion point temperature of Corning 1737 is 667° C. and higher than that of Corning, 7059. Even when an amorphous semiconductor film is formed on the Corning 1737 substrate and it is left at 600° C. for 20 hours, a deformation of the substrate such as to affect a manufacturing process was not observed. However, the heating time of 20 hours is too long for a mass production process. Also, it is preferable that the heating temperature of 600° C. be as lower as possible in view of a cost.
In order to solve such problems, a new crystallization method is devised. This method is described in details in Japanese Patent Application Laid-open No. Hei 7-183540. Here, this method will be briefly described. First, a trace amount of metallic element such as nickel, palladium, or lead is added to an amorphous semiconductor film. The addition method is preferably performed using plasma processing method, an evaporation method, an ion implantation method, a sputtering method, a solution coating method, or the like. After the above addition, for example, when the amorphous silicon film is left in a nitrogen atmosphere at 550° C. for 4 hours, a crystalline semiconductor film having a preferable characteristic is obtained. Heating temperature, heating time, and the like, which are suitable for crystallization are dependent on an addition amount of metallic element and a state of the amorphous semiconductor film.
However, according to the above technique, there is a problem in that the metallic element used for promoting crystallization is left also in high resistance layers (channel forming region and offset region). Since electric current can easily flow through the metallic element, a resistance of a region which should be a high resistance layer is reduced. Therefore, an off current is increased and thus variation between respective elements is produced, which causes deterioration in the stability and reliability of a TFT characteristic.
In order to solve this problem, a technique (gettering technique) for removing an metallic element for promoting crystallization from a crystalline semiconductor film is developed and disclosed in Japanese Patent Application Laid-open No. Hei 10-270363. According to the gettering technique, first, an element belonging to group 15 is selectively added to the crystalline semiconductor film and thermal treatment is performed. By this thermal treatment, the metallic element in a region to which the element belonging to group 15 is not added (gettered region) is emitted from the gettered region to be diffused and captured in a region to which the element belonging to group 15 is added (gettering region). As a result, the metallic element can be removed or reduced in the gettered region. Further, heating temperature at the gettering can be made to be 600° C. or lower which the lass substrate can withstand. Also, it is confirmed that even when not only an element belonging to group 15 but also an element belonging to group 13 is introduced, the metallic element can be gettered.
The crystalline semiconductor film formed through such manufacturing steps has high mobility. Thus, a thin film transistor (TFT) is formed using the crystalline semiconductor film and often utilized for, for example, an active matrix electric device.
In an active matrix liquid crystal display device, a pixel circuit for performing image display for each functional block and a driver circuit over a single substrate for controlling the pixel circuit composed of a shift register circuit, a level shifter circuit, a buffer circuit, a sampling circuit, and the like formed on the basis of a CMOS circuit as the basics are formed.
In the pixel circuit of the active matrix liquid crystal display device, TFTs (pixel TFTs) are arranged for each of several tens to several millions of pixels and a pixel electrode is provided in each of the pixel TFTs. An opposing electrode is provided on an opposing substrate positioned so as to sandwich the liquid crystal therebetween to thereby form a kind of capacitor using liquid crystal as dielectric. This device is configured such that a voltage applied to the respective pixels is controlled by a switching function of a TFT to control a charge to the capacitor to thereby drive the liquid crystal, and the amount of transmitting light is controlled to display an image.
The pixel TFT is made from an n-channel TFT and used as a switching element for applying a voltage to the liquid crystal to drive it. Since the liquid crystal is driven by an alternating current, a method called a frame reverse drive is employed in many cases. Since power consumption is suppressed to be low with this method, with respect to a characteristic required for the pixel TFT, it is important to sufficiently reduce an off current value (drain current flowing at an off operation of the TFT).
A low concentration drain (LDD: lightly doped drain) structure is known as a TFT structure for reducing the off current value. In this structure, a region to which an impurity element is added at a low concentration is provided between the channel forming region and the source region or the drain region, which is formed by adding an impurity element thereto at a high concentration. This region is called a LDD region. Also, a so-called GOLD (gate-drain overlapped LDD) structure in which the LDD region is overlapped with the gate electrode through a (ate insulating film is known as means for preventing deterioration of an on current value due to a hot carrier. It is known that with such a structure, a high electric field near the drain is relaxed to prevent hot carrier injection and thus a deterioration phenomenon is effectively prevented.
Also, in order to obtain the GOLD structure, end portions of the gate electrode are formed in a shape having tapers. With such a shape, a step of introducing an impurity element for imparting an n-type to a semiconductor layer composing an n-channel TFT and a step of introducing an impurity element for providing a p-type to a semiconductor layer composing a p-channel TFT are respectively performed by one doping processing. Thus, the source region and the drain region are formed in a region which is not overlapped with the gate electrode and LDD regions having concentration gradients in conformity with the shape of the tapers can be formed under the tapers of the gate electrode.
Also, energy of an ion implanted into the semiconductor film in doping processing is very large as compared with bond energy of elements composing the semiconductor film. Thus, the element composing the semiconductor film is flown from a lattice point by the ion implanted into the semiconductor film to produce a defect in crystal. Therefore, after the doping processing, in order to repair the defect and simultaneously to activate the implanted impurity element, thermal treatment is performed in many cases. As the thermal treatment, there is a thermal annealing method using a furnace-annealing furnace, a laser annealing method, or a rapid thermal annealing method (RTA method). Also, the activation of the impurity element is an important process in order to produce the reunions to which the impurity element is added to be low resistance regions so that they can function as the LDD regions, the source region, and the drain region.
The element belonging to group 15 is implanted into the semiconductor film by an ion doping method (which is a method of dissociating PH3 or the like by plasma and accelerating an ion by an electric field to implant it into the semiconductor film, in which mass separation of an ion is basically not performed). When, for example, phosphorus is introduced for gettering, a necessary phosphorus concentration is 1×1020/cm3 or higher. The addition of the element belonging to group 15 by the ion doping method causes an amorphous state of the semiconductor film. However, an increase in a concentration of the element belonging to group 15 hinders recrystallization by later thermal treatment and thus this becomes a problem. Also, the addition of the element belonging to group 15 at a high concentration causes an extension of processing time required for the doping, which is a problem since it results in a reduction of a throughput in a doping step.
Further, the element belonging to group 15 is an impurity element for providing an n-type. It is required that a concentration of an impurity element for providing a p-type (for example, the element belonging to group 13), which is necessary to reverse a conductivity type is 1.5 times to 3 times higher than that of the element belonging to group 15, which is added to the source region and the drain region of a p-channel TFT. Thus, there is a problem in that a resistance of the source region and the drain region is increased due to the difficulty of recrystallization.